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Rockchip RK3229

RK3229 is a high performance Quad-core application processor for smart TV-Box. Especially it is a high-integration and cost efficient SOC for 4K 10-bit H.265/H.264/VP9 TV-Box. Quad-core Cortex-A7 is integrates with separately Neon and FPU coprocessor, also shared 256KB L2 Cache. The penta-core GPU including one geometry processors (GP) and dual pixel processors (PP) and dual core 2D GPU engine, support smoothly high-resolution display and mainstream game.

Lots of high-performance interface to get very flexible solution, such as multi-pipe display with HDMI2.0, TV Encoder. Trust Zone and crypto hardware is integrated for support security BOOT. 32bits DDR3/LPDDR3 provides high memory bandwidths for high-performance. RK3229 have very good Linux support including U-Boot, kernel, graphics, video decoder and encoder.

RK3229 SoC Feature


  • CPU
    • Quad-core ARM Cortex-A7MP Core processor, a high-performance, low-power and cached application processor
    • Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation
    • Separately Integrated Neon and FPU per CPU
    • 32KB/32KB L1 I-Cache/D-Cache per CPU
    • Unified 256KB L2 Cache
    • Trustzone technology support
  • GPU
    • ARM Mali400 MP2
    • High performance OpenGL ES1.1 and 2.0, OpenVG1.1 etc
    • Embedded 4 shader cores with shared hierarchical tiler
  • Memory
    • 36KB internal SRAM
    • Dynamic Memory Interface (DDR3/DDR3L/LPDDR2/LPDDR3): Compatible with JEDEC standard DDR3-1600/DDR3L-1600/LPDDR2-800/LPDDR3-1333 SDRAM. Supports 32 Bits data width, 2 ranks (chip selects), totally 2GB (max) address space.
    • Nand Flash Interface: Support 8bits async/toggle/syncnandflash, up to 4 banks. 16bits, 24bits, 40bits, 60bits hardware ECC
    • eMMC Interface: Compatible with standard eMMC interface, Support MMC4.51 protocol
    • SD/MMC Interface: Compatible with SD2.0, MMC4.51
  • System Component
    • Timer: 6 on-chip 64bits Timers in SoC with interrupt-based operation for non-secure application. 2 on-chip 64bits Timers in SoC with interrupt-based operation for secure application
    • PWM: 4 on-chip PWMs with interrupt-based operation
    • WatchDog: 32 bits watchdog counter width
  • Video
  • JPEG Codec
    • Decoder size is from 48x48 to 8176x8176(66.8Mpixels). Maximum data rate is up to 76million pixels per second
    • Encoder image size up to 8192x8192(64million pixels) from 96x32. Maximum data rate up to 90million pixels per second
  • Display
    • HDMI interface: Support YUV420 4k x 2k @ 60fps. Support for 4k x 2k and 3D video formats. Support for up to 10.2bps bandwidth. Compliant HDMI 2.0. Compliance HDMI compliance Test specification 1.4. Support HDCP 2.2.
    • CVBS interface: TV encoder 10bit out for DAC
  • Camera interface
    • No camera interface. Only support USB Camera
  • Audio
    • I2S0/I2S1 with 8ch: supports up to 8 channels (8xTX or 8xRX). Audio resolution from 16bits to 32bits. Sample rate up to 192KHz
    • I2S2/PCM with 2ch: Up to 2 channels (2xTX and 2xRX). Audio resolution from 16bits to 32bits. Sample rate up to 192KHz
    • SPDIF: Support two 16-bit audio data store together in one 32-bit wide location.
    • Audio Codec: 24bit DAC. Support Line-out. Support Mono, Stereo, 5.1 HiFi channel performance. Sampling rate of 8kHz/12kHz/16kHz/24kHz/32kHz/44.1KHz/48KHz/96KHz
  • Connectivity
    • SDIO interface: Embedded one SDIO interface, Compatible with SDIO 3.0 protocol
    • TS interface: Supports one TS input channel.Supports 4 TS Input Mode: sync/valid mode in the case of serial TS input; nosync/valid mode, sync/valid, sync/burst mode in the case of parallel TS input.
    • Smart Card: support card activation and deactivation
    • GMAC 10/100/1000M Ethernet Controller: Supports 10/100/1000-Mbps data transfer rates with the RGMII interfaces. Supports 10/100-Mbps data transfer rates with the RMII interfaces.
    • Ethernet PHY: Integrated IEEE 802.3/802.3u compliant 10/100Mbps Ethernet PHY. Supporting both full and half duplex for either 10 or 100 Mb/s data rate
    • SPI Controller: One on-chip SPI controller
    • UART Controller: 3 on-chip UART controllers
    • I2C controller: 4 on-chip I2C controllers
    • USB Host2.0: Embedded 3 USB Host 2.0 interfaces
    • USB OTG2.0: Compatible with USB OTG2.0 specification. Supports high-speed(480Mbps), full-speed(12Mbps) and low-speed(1.5Mbps) mode
  • Other
    • Temperature Sensor(TS-ADC): 10-bits SAR ADC up to 50KS/s sampling rate. 0~80C temperature range and 5C temperature resolution
    • eFuse: Two high-density electrical Fuse is integrated: 256bits (32x8) / 1024bits (32x32)
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